When employing semiconductor processes for manufacturing a fin field-effect transistor (FinFET), it is always essential to grow a superior silicon germanium epitaxial material layer in a silicon substrate. Besides, prior to the growth of the silicon germanium epitaxial layer, it is necessary to form grooves in the silicon substrate, and then grow the silicon germanium epitaxial layer in the grooves in the Si-substrate.
However, since there are distinct electrical requirements for various types of transistor devices, it thus becomes necessary to grow silicon germanium epitaxial material layers in various shapes and depths. Under the circumstances, it will become insufficient to form grooves in the Si-substrate by simply utilizing a single etching process. However, once several etching processes have been carried out, it will become impossible to retain the specific contours of grooves, since the pre-formed grooves will suffer from the problem of over-etching, resulted from the corrosion by subsequent etching processes.
In view of the aforementioned reasons, there is a need to provide an improved etching method and a fin field-effect transistor (FinFET) device structure with a polygonal silicon germanium epitaxial material layer for solving the above-mentioned problems.